Tags:
create new tag
view all tags

Electrical Module Results

First Electrical Module (LBL EL-01)

Assembly

DAQ results below

Module Without Power Board

In order to study the before/after effects, LBL EL-01 was tested before adding the power board. Throughout testing the first module, all of the cables and boards (SLVS, Atlys, etc.) have been replaced by Charilou since the setup for the DAQ loads. (The new HV cables were made by Marcos Turqueti, from engineering.)

When first biasing the sensor, there were problems with high leakage current at 0V. After discussing this with Santa Cruz and Liverpool, this was fixed by adding Kapton insulation to the bottom (2mil), sides (1mil), and top of the "panhandle" (2mil) section of the HV chuck.

The software has also been updated, as of December 5, 2017. We had also bought the new Nexys board, which has been set up on the laptop. Maosen also set up the new PC with the newer version of the DAQ software around November 27-29, 2017.

The module had gone through various tests, due to long test times (fixed with the DAQ software update) and fixing of the dry air filter in 50B-6238 (during which we temporarily used nitrogen tanks). The sensor operates best at RH<10%, preferably kept in dry air for at least 3 hours.

Capture Chip ID Problems

After the hybrids were glued and bonded onto the LBL EL-01 in July 2017, we were able to capture the HCC Addresses correctly but not the Chip IDs. As time went on, we were able to read back less and less chips. Many attempts to fix this included: changing to a new SLVS buffer board that SCIPP had tested and verified as working (old one pulled I=0.261-0.263A; new one pulled I=0.271-0.278A), changed on 8/18/2017, a new module adapter, which SCIPP had tested and verified as working, on 8/3/2017, a new VMOD-ID board received from SCIPP and changed on 8/3/2017, and a new testframe to SLVS buffer board cable, made by Charilou.

Scans done to test the chips were iDelay Scan (drop down menu), Stream Demux Scan (drop down menu), and a scan of variable 10011 (command line).

To set the stream delays (from Bruce's response to Vitaliy's query to the mailing list on July 14, 2017):

  1. Capture->"Stream Demux Scan"
  2. Look for a range of values where the response is similar and pick a value in the middle.
  3. e->ConfigureVariable(50, demux_value);
  4. Capture->"iDelay Scan"
  5. Pick a good value
  6. e->ConfigureVariable(20, idelay_value);
To scan the OPHASE, which controls the output signal phase relative to the BCO, you can scan by using

[e->ConfigureVariable(10011, X)] with X=[0x00, 0x11, 0x22... 0xee, 0xff]

In the email Craig sent in response to Vitaliy on July 10, 2017, he says to test each step with an ABC ID read. "You should find an operating window for successful chip ID reads and then you should take the value from the middle of this window for running the DAQ." When testing here at LBL, we were able to see the operating window by looking at the HCCs (couldn't see the ABCs). The operating window was [0xcc, 0xdd, 0xff, 0x00, 0x11, 0x22], but we couldn't capture chips at 0x00 nor 0xff.

Timon noticed that the current was fluctuating too much for the chips. We then found that the LV cable was unraveling inside the connector. Charilou cut and crimped the wire and put a new connector on 8/21/2017. The LV current was no longer fluctuating, and we were able to read back most of the chips. All chips were ok except for the first loop (chips 16, 17, 18, 19, 20) of the RH Hybrid (Panel D, Hybrid 7, HCC14). This was fixed by using DCS->ABC LDO cycle one->Hybrid 0.

HV Biasing

We have no records of previous IVs done on the sensor (S10938-2244(X), ATLAS12A Main Sensor, VPX14757-W782, Outer Cut) before being used for the electrical module and fully bonded.

When trying to test the chips, originally only Strobe Delay (0.57) worked. 3PointGain@1fC had multiple errors saying, "Too many defects. CHECK!" and no plots for the response curves, gain, and output noise for most of the chips. TrimRange also didn't have outputs for most of the chips, and, for the ones with outputs, they had much less curves than before. We initially attributed it to the chips overheating and decided to cool to T=15C, assuming the chips would be 2-3C hotter than what we sensed on the cooling chuck. This didn't work so those from the SCT (e.g. Sandra and Tony Affolder) remembered that biasing the sensor would decrease the noise.

This is also around the time we tried doing IVs of the sensor. After the first attempt, we were told by Santa Cruz that the compliance should be around 10uA. We noticed, however, there was a high, positive leakage current (+3-6uA) when ramping back down to 0V. Liverpool saw this with their setup and was able to fix it with an extra black Kapton spacer. Santa Cruz used an extra Kapton spacer as well as painting the HV chuck with black electrical tape paint. We were able to fix it by adding Kapton insulation to the bottom (2mil), sides (1mil), and top of the "panhandle" (2mil) section of the HV chuck.

In order to test that this was fine, we used an empty test frame, which was fully loaded with the proper SMDs and had wires connecting [HVret and LVGND] and the wire for [HV connection to the HV screw]. Maximum leakage current was 20nA at 1000V. This was done on 9/19/2017.

While we were figuring out how to fix the HV leakage current, we were able to test the sensor at low voltages (50-100V) and saw better response from the chips. Increasing the HV led to the noise decreasing. Before irradiation, however, the sensor should be tested slightly above depletion (specs say <330V), so groups are testing the sensors at 400V.

Testing LBL EL-01 with Nitrogen

When we started cooling the sensor, we noticed that we were having trouble drying the DAQ testing box. When Ken Wilson took a look at the dry air system, he noticed it wasn't working properly. Until they could fix/replace the dry air system, we started using nitrogen on Sept. 13, 2017. (The new dry air system was set up by Ken on Nov. 20, 2017, and our setup was connected on Nov. 21, 2017.) We also had very old vacuum tubing that needed to be replaced; Ken fixed it on Sept. 18, 2017.

In order to keep the box dry, we had to use a lot of nitrogen, which became a limiting factor when testing. (The sensor works best at RH<10% and breaks down early in higher humidity.) We needed a bottle every 2-3 days, even after taping the sides of the box/lid, putting weights on the lid, and using the black cloths (for light tightness, but also helped with containing the dry air).

There are two calibration tests that need to be done before testing the module: Strobe Delay and TrimRange. (We later learned in October that you can load the output files to the /sctvar/config files in order to skip these tests. They are temperature dependent, so you would need to do it again if testing at a different temperature. Since StrobeDelay doesn't take too long, it is suggested to run it before every test and just load your TrimRange file.) Strobe Delay(0.57) took 5-10 minutes. TrimRange took ~2hrs. Since the sensor works better after being dried for at least 3 hours before testing, that meant we could only do tests about 5hrs into the work day.

3PointGain@1fC took ~1-2hrs and was done on 9/22/2017. When trying to do Response Curve and Noise Occupancy, there were a lot of times we had to stop due to errors, long run times (2-3 hours after the end of the workday), or lack of nitrogen. We were able to finish Response Curve on 10/3/2017, with a run time of ~4hrs. (Santa Cruz at the time said it took 5-6hrs for them on a Windows computer; we run LinuxMint.) The Noise Occupancy test finished in ~2hrs (surprisingly, due to previously running for over 5 hours nonstop) on 10/10/2017.

After completing all the tests, we glued and bonded the power board to the module.

Module With Power Board

When testing the module with the power board, we noticed that the HV leakage current increased (~10nA) with the power board, which Timon said is probably due to the DCDC converter.

Strobe Delay (0.57) finished in <3min. TrimRange took around 2hr 30min. 3PointGain@1fC finished ~40min, with the trim files loaded. Response Curve and Noise Occupancy, however, did not finish despite being left running for a long time. (RC left running for ~6hrs before stopping. NO left running for almost 9hrs before stopping.)

After talking with Peter, we were told that the run time for all the tests should only be 60-90min. The corrections he told us on 11/2/17 were:

1) HCC register 12 from 0x88008800 to 0x33333333

  • This corrects the data/ xoff sampling phase into HCC

2) All LDOA and LDOD values from (whatever) to 0x03ff

  • The values in your config files seem to date back to one of the very early hybrids, which were tuned on a one by one basis using a voltmeter. They were also not tuned as the LDO designer had intended (it is a "unary" DAC). However based on wafer probe statistics of ~1200 chips with the revised procedure, 0x3ff is the median of the distribution for this setting and will be correct for 75% of the chips and generally within 30mV for most others. It will be better than the present values for sure -- as it stands some chips may be running under voltage.
Also: "Many of our hybrids at RAL also run with HCC R1 set to 0xE0A18300, this changes the phase of 160MHz clock B used internally by HCC to generate the 80 MHz DRC clock. I don't think this is your problem, but this might be something else to try if the suggestions are not sufficient to eliminate the timeout errors by themselves."

These changes led to us being unable to capture the correct chip IDs.

Santa Cruz was able to get 60-90min test times after upgrading to the Nexys board. When we told the group about Peter's suggestions, Matt Gignac (from Santa Cruz) said he "managed to get it working with all the modifications Peter suggested below with the following caveat: when I change R1 to 0xE818300 for our left-handed (Hy1) hybrid, the chip ID's are incorrect. So to be complete, what works for me is changing the LDOD/LD0A to 1023 and HCC register 12 0x33333333. I should mention that our right-handed hybrid (Hy5) already had R1 set to 0xE818300."

Other attempts to fix this included getting a new PC, which hadn't worked (see below for the fix), and the Nexys board, which we obtained after we got the DAQ to work. We were later able to do all the tests after updating the software to the newest version with the 'Full Test' option. (Had not tried to update the software earlier due to failed attempts back in August.)

The Full Test, which does tests in the order of Strobe Delay(0.57), 3PointGain@1fC, TrimRange, 3PointGain@1fC, Response Curve, 3PointGain@1fC, and Noise Occupancy, took 2hr 10min.

As Stand Alone Tests:

  • Strobe Delay(0.57): 1-2min
  • 3PointGain@1fC: ~5min
  • TrimRange: ~21min
  • Response Curve: ~32min
  • Noise Occupancy: ~1hr 47min
These were done on Dec. 9, 2017 on the laptop with the Atlys board.

RH Hybrid Broken

After successfully testing the module on the Atlys board, we tried setting up DAQ for the Nexys board and the new PC, which we asked Jeff to change the OS from Fedora27 to SLC6. (Fedora27 wasn't compatible with one of the ROOT dependencies.) We also found that we needed a USB to Gigabit Ethernet Network Adapter in order to receive data from the module; the one on the laptop wasn't compatible so a new one was ordered.

One of the known problems about the test frame is that the sensor can pop out if improperly placed on the testing jig. The sensor also shifts inside the frame, which can strain the wire bonds. When putting the module on the testing jig on 12/xx/2017, the module wasn't aligned correctly, and the sensor popped out of the frame. Phat rebonded it later that day. The module wasn't working when we tested it the next day, and a visual inspection found a small scratch (source unknown) on Hybrid 7, Chip 19. On chip 19, the DATRB bond was moved to the GNDD pad of the ABC130, and the bonds for GNDD and XOFFR were broken. The nearby bonds on chip 18 were also affected; they were leaning but still attached.

We tried running tests before/after removing the bad bonds, as well as disabling the bad chips. The results were all the same:

  • Can capture Chip IDs correctly
  • When the bad hybrid is enabled, there is no output for any of the tests (StrobeDelay, 3PointGain, TrimRange, etc.)--even for the working hybrid! (Errors: 'No data to parse ABC130event!' and 'hsio_read_event')
  • Also cannot LDO enable/disable cycle--crashes DAQ
  • The left-handed hybrid works when the right-handed hybrid is disabled in the st_system_config.dat file.

Updates (2/2/2018)

Carl tried to rescue the broken module. He scraped the dameaged pads and used alcohol to clean the scracthed area. Then Rhonda rebonded the wires in damaged area. Also we noticed two wires on data side and two wires on power side were broken. We fixed that later on. We ran the tests for the module, HCC IDs and chips IDs were captured correctly. And there were output for StrobeDelay test, but the results were very ugly.

Reworking

Phat replaced two chips (22 and 19 for RH), and this was done around 2/20/2018. But we met several problems, which were solved day by day:

  • Couldn't read 18 and 19, finally found DATR wire was loose (the foot still touching the pad) on chip 19.
  • For first loop of RH (16~20), we always had direction problem. We couldn't get correct IDs for direction 0, but it worked for direction 1. But someday for direction 1 it even didn't work (20 19 18). And it was solved by adding the third long wire (next to the ID bonds) on U3.
  • For direction problem, it was solved by changing LDOD from 1023 to 665. It adjusted the voltage on chips.
  • We noticed that when the module was packed in the shipping box, the chips ID could be captured correctly without chaning LDOD to 665.

Shipped

It was proved that the module was working well, and the module was shipped out on Mar 6th, 2018! The testing results are attached below.

-- Charilou Labitan - 2018-01-25

Comments


Topic attachments
I Attachment History Action Size Date Who Comment
JPEGJPG 01402146-2981-4B01-9B39-1A81B9B156E8.JPG r1 manage 2688.0 K 2018-02-01 - 21:02 CharilouLabitan LBL EL-01 Broken Hybrid -- Scratch
JPEGJPG 1375D2B8-BD16-4880-8B38-50366DE97283.JPG r1 manage 2467.1 K 2018-02-01 - 21:02 CharilouLabitan LBL EL-01 Broken Hybrid -- Scratch
JPEGJPG 39BB3C13-A1EF-4ECD-88D3-009BE42706A9.JPG r1 manage 4010.9 K 2018-02-01 - 21:02 CharilouLabitan LBL EL-01 Broken Hybrid -- Scratch
JPEGJPG 5B1A8836-8D23-4D2E-A8E9-74B9BC6C3502.JPG r1 manage 3626.6 K 2018-02-01 - 21:02 CharilouLabitan LBL EL-01 Broken Hybrid -- Scratch
Texttxt ABC130_Panel_D_Hybrid1_HCC20_20171024.txt r1 manage 9.3 K 2018-02-01 - 20:59 CharilouLabitan LBL EL-01 400V (With Power Board)
Texttxt ABC130_Panel_D_Hybrid1_HCC20_20171106.txt r1 manage 8.2 K 2018-02-01 - 20:59 CharilouLabitan LBL EL-01 400V (With Power Board)
PDFpdf ABC130_Panel_D_Hybrid1_HCC20_ABC130NoPlot_20171010_164224.pdf r1 manage 426.8 K 2018-02-01 - 20:59 CharilouLabitan LBL EL-01 400V (Before Power Board)
PDFpdf ABC130_Panel_D_Hybrid1_HCC20_NoScurve_20171010_164224.pdf r1 manage 1315.0 K 2018-02-01 - 20:59 CharilouLabitan LBL EL-01 400V (Before Power Board)
PDFpdf ABC130_Panel_D_Hybrid1_HCC20_RCPlot_20170920_152657.pdf r1 manage 544.4 K 2018-02-01 - 20:56 CharilouLabitan LBL EL-01 50V
PDFpdf ABC130_Panel_D_Hybrid1_HCC20_RCPlot_20171003_190011.pdf r1 manage 625.6 K 2018-02-01 - 21:00 CharilouLabitan LBL EL-01 400V (Before Power Board)
PDFpdf ABC130_Panel_D_Hybrid1_HCC20_RCPlot_20171024_114150.pdf r1 manage 546.5 K 2018-02-01 - 20:59 CharilouLabitan LBL EL-01 400V (With Power Board)
PDFpdf ABC130_Panel_D_Hybrid1_HCC20_RCPlot_20171106_132524.pdf r1 manage 546.0 K 2018-02-01 - 20:59 CharilouLabitan LBL EL-01 400V (With Power Board)
Texttxt ABC130_Panel_D_Hybrid1_HCC20_RC_178_29.txt r1 manage 70.2 K 2018-02-01 - 20:58 CharilouLabitan LBL EL-01 400V (Before Power Board)
Texttxt ABC130_Panel_D_Hybrid1_HCC20_RC_182_23.txt r1 manage 70.3 K 2018-02-01 - 20:58 CharilouLabitan LBL EL-01 400V (Before Power Board)
Texttxt ABC130_Panel_D_Hybrid1_HCC20_RC_186_3.txt r1 manage 70.4 K 2018-02-01 - 20:59 CharilouLabitan LBL EL-01 400V (With Power Board)
Texttxt ABC130_Panel_D_Hybrid1_HCC20_RC_208_3.txt r1 manage 70.4 K 2018-02-01 - 20:59 CharilouLabitan LBL EL-01 400V (With Power Board)
PDFpdf ABC130_Panel_D_Hybrid1_HCC20_StrobeDelayPlot_20170920_125237.pdf r1 manage 443.6 K 2018-02-01 - 20:56 CharilouLabitan LBL EL-01 50V
PDFpdf ABC130_Panel_D_Hybrid1_HCC20_StrobeDelayPlot_20170922_143603.pdf r1 manage 437.5 K 2018-02-01 - 20:57 CharilouLabitan LBL EL-01 400V
PDFpdf ABC130_Panel_D_Hybrid1_HCC20_TrimRangePlot_20170920_144428.pdf r1 manage 3191.7 K 2018-02-01 - 20:56 CharilouLabitan LBL EL-01 50V
Texttxt ABC130_Panel_D_Hybrid7_HCC14_20171024.txt r1 manage 8.5 K 2018-02-01 - 20:59 CharilouLabitan LBL EL-01 400V (With Power Board)
Texttxt ABC130_Panel_D_Hybrid7_HCC14_20171106.txt r1 manage 8.5 K 2018-02-01 - 20:59 CharilouLabitan LBL EL-01 400V (With Power Board)
PDFpdf ABC130_Panel_D_Hybrid7_HCC14_ABC130NoPlot_20171010_164224.pdf r1 manage 415.3 K 2018-02-01 - 20:59 CharilouLabitan LBL EL-01 400V (Before Power Board)
PDFpdf ABC130_Panel_D_Hybrid7_HCC14_NoScurve_20171010_164224.pdf r1 manage 1268.5 K 2018-02-01 - 20:59 CharilouLabitan LBL EL-01 400V (Before Power Board)
PDFpdf ABC130_Panel_D_Hybrid7_HCC14_RCPlot_20170920_152657.pdf r1 manage 542.7 K 2018-02-01 - 20:56 CharilouLabitan LBL EL-01 50V
PDFpdf ABC130_Panel_D_Hybrid7_HCC14_RCPlot_20171003_190011.pdf r1 manage 626.9 K 2018-02-01 - 21:00 CharilouLabitan LBL EL-01 400V (Before Power Board)
PDFpdf ABC130_Panel_D_Hybrid7_HCC14_RCPlot_20171024_114150.pdf r1 manage 545.8 K 2018-02-01 - 20:59 CharilouLabitan LBL EL-01 400V (With Power Board)
PDFpdf ABC130_Panel_D_Hybrid7_HCC14_RCPlot_20171106_132524.pdf r1 manage 545.2 K 2018-02-01 - 20:59 CharilouLabitan LBL EL-01 400V (With Power Board)
Texttxt ABC130_Panel_D_Hybrid7_HCC14_RC_178_29.txt r1 manage 70.3 K 2018-02-01 - 20:58 CharilouLabitan LBL EL-01 400V (Before Power Board)
Texttxt ABC130_Panel_D_Hybrid7_HCC14_RC_182_23.txt r1 manage 70.4 K 2018-02-01 - 20:58 CharilouLabitan LBL EL-01 400V (Before Power Board)
Texttxt ABC130_Panel_D_Hybrid7_HCC14_RC_186_3.txt r1 manage 70.3 K 2018-02-01 - 20:59 CharilouLabitan LBL EL-01 400V (With Power Board)
Texttxt ABC130_Panel_D_Hybrid7_HCC14_RC_208_3.txt r1 manage 70.3 K 2018-02-01 - 20:59 CharilouLabitan LBL EL-01 400V (With Power Board)
PDFpdf ABC130_Panel_D_Hybrid7_HCC14_StrobeDelayPlot_20170920_125237.pdf r1 manage 440.3 K 2018-02-01 - 20:56 CharilouLabitan LBL EL-01 50V
PDFpdf ABC130_Panel_D_Hybrid7_HCC14_StrobeDelayPlot_20170922_143603.pdf r1 manage 436.2 K 2018-02-01 - 20:57 CharilouLabitan LBL EL-01 400V
PDFpdf ABC130_Panel_D_Hybrid7_HCC14_TrimRangePlot_20170920_144428.pdf r1 manage 3178.0 K 2018-02-01 - 20:56 CharilouLabitan LBL EL-01 50V
JPEGJPG B43BFC5B-CF1A-41A5-ACD7-C06D4327C5F3.JPG r1 manage 2522.2 K 2018-02-01 - 21:02 CharilouLabitan LBL EL-01 Broken Hybrid -- Scratch
Unknown file formatgz Hybrid1.tar.gz r1 manage 6175.8 K 2018-03-07 - 19:48 MaosenZhou Testing results for reworked module
Unknown file formatgz Hybrid7.tar.gz r1 manage 6133.9 K 2018-03-07 - 19:48 MaosenZhou Testing results for reworked module
JPEGJPG IMG00070.JPG r1 manage 413.5 K 2018-02-02 - 19:25 MaosenZhou The damaged pads on the chip
Microsoft Excel Spreadsheetxlsx StrobeDelay0.57Results.xlsx r1 manage 35.6 K 2018-02-01 - 20:57 CharilouLabitan LBL EL-01 400V
PNGpng TestFrame_IV.png r1 manage 49.8 K 2018-02-01 - 21:01 CharilouLabitan Test Frame IV (after Kapton insulation)
Unknown file formatdat TestframeIV.dat r1 manage 2.8 K 2018-02-01 - 21:01 CharilouLabitan Test Frame IV (after Kapton insulation)
Edit | Attach | Watch | Print version | History: r10 < r9 < r8 < r7 < r6 | Backlinks | Raw View | Raw edit | More topic actions
Topic revision: r10 - 2018-03-07 - MaosenZhou
 
This site is powered by the TWiki collaboration platform Powered by PerlCopyright © 2008-2019 by the contributing authors. All material on this collaboration platform is the property of the contributing authors.
Ideas, requests, problems regarding TWiki? Send feedback